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3. |
Silicon
Test, Debug, Characterization and Spice Modeling. |
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Micro probed M7 power
grids on 90nm parts using a
Silicon Validation environment in an
attempt to correlate simulation with silicon.
Captured scope traces to characterize power supply variation during
high activity core and memory accesses. |
3/05 - 4/05. |
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Performed post-silicon probing of 256KB
SRAM on IMS tester using BIST Patterns to evaluate column redundancy
replacement. |
10/02 – 4/03. |
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Designed
a two stage level-shifting amplifier using discrete op amps to enable binning
of the differential bit line voltage in an embedded DRAM Vehicle. |
3/97 – 5/97. |
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Created
2T, 1T and 1.5T flash macro-models for spice simulations. |
8/94 – 12/95. |
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Measured
band-to-band tunneling, BTB, and Fowler-Nordheim DC I-V on 2T flash
bitcell test structures using the HP4156
Semiconductor Analyzer. Flash Cell used in M68HC08 Family. |
9/94 – 9/95. |
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Used a discrete op amp I-V converter to
capture a scope trace of BTB transient in 4K array. |
12/94. |
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