|
4. |
CAD TOOLS and SKILLS |
8/94 – 7/07. |
|
Schematic creation with Composer and Design
Architect. Fast spice simulation with Hsim/Nanosim/Timemill. SRAM behavioral modeling and testbench
writing with Verilog. Testbench simulation with Modelsim. Layout editing/viewing with Virtuoso and IC
Station. Full-chip APR viewing and tracing with Magma, Calibre and Nodeplot generation, density checks and
LVS/DRC with Hercules.
Spice for memory design, race checks,
margin, power estimation and parameterized power grid optimization. PPLAN/PGRID
for pre-layout power delivery design. Post-layout full-chip static power grid
validation with VoltageStorm. File and data processing with Perl. |
||
|
|
||